Zilog EZ80190 - Manual (Page 80)

eZ80190 Development Kit
User Manual
UM014108-0810 General Array Logic Equations
76
//input[7:0] A;upper part of Address Bus of 190
//A23=A7,A22=A6,A21=A5,A20=A4,A19=A3
//A18=A2,A17=A1,A16=A0
output
nCS_EX /* synthesis loc="P17"*/,//enables
memory on the
// Expansion Module
nmemen1 /* synthesis loc="P18"*/,//enables
memory on
// the Development Platform
nmemen2 /* synthesis loc="P19"*/,
nmemen3 /* synthesis loc="P20"*/,
nmemen4 /* synthesis loc="P21"*/,
nEM_EN /* synthesis loc="P24"*/,//enables
LED and the
// general-purpose port.
nDIS_FL /* synthesis loc="P25"*/,
nL_RD /* synthesis loc="P23"*/
;
wire nCS_EX,
nmemen1,
nmemen2,
nmemen3,
nmemen4;
//wire MOD_DIS =
((nmemen1==0)|(nmemen2==0)|(nmemen3==0)|(nmemen4==0)
);//if any
//of the signals is Low,