Zilog EZ80190 - Manual (Page 54)

eZ80190 Development Kit
User Manual
eZ80190 Module UM014108-0810
50
To connect the eZ80190 Module directly to another host (e.g., to a per-
sonal computer), a crossover cable must be used.
The EMAC can be additionally protected by placing an ESD protection
array on the module at U8. This array can be either of the LCDA15C-6
(Semtech) or ESDA25B1 (ST Microelectronics) devices.
GPIO Pins for Enabling LAN Activity, Sleep, Interrupt
GPIO input bit PD4 serves as an active High interrupt input for the
EMAC’s INTRQ0 output.
GPIO output bit PD7 can be used to place the EMAC into SLEEP mode.
When pulling SLEEP (PD7) Low after enabling HWStandbyE and
HWSleepE modes, the chip draws lower current, because only the
receiver is operating. A zero-Ohm resistor at position R14 on the
eZ80190 Development Kit is required for this function.
If LAN activity is detected, the LANACT signal is pulled Low. The
LANACT is connected to GPIO input PD6 and can be used in interrupt
edge-detection mode to wake up and reinitialize the Ethernet chip. A
zero-Ohm resistor at position R15 on the module is required for this func-
tion. In this case, the PD6 pin is not available for GPIO on the I/O connec-
tor.
EMAC Access
CS3 is used for selecting the Ethernet MAC. For 50 MHz operation, set
the CS3_CTL register (I/O address
B3h ) to F8h (7 wait states for I/O).
The EMAC requires –IOR to be active for 135 ns and –IOW to be active
for 110 ns.
To satisfy proper setup times at 50 MHz, –IOR is delayed by one clock
cycle and –IOW is delayed by two clock cycles when CS3 goes active. To
satisfy proper hold times at 50 MHz, the EMAC address and data are
latched when CS3 goes inactive.