Zilog EZ80190 - Manual (Page 35)

eZ80190 Development Kit
User Manual
UM014108-0810 Operational Description
31
eZ80Acclaim! ® Development Platform Memory
Memory space on the eZ80Acclaim! ® Development Platform consists of
onboard SRAM and additional footprints.
Onboard SRAM
The eZ80Acclaim!
®
Development Platform features 512 KB SRAM at
U20. This SRAM provides the basic memory requirement for small appli-
cations development. This SRAM is in the address range
B80000h –
BFFFFFh .
Additional SRAM
The amount of eZ80Acclaim! ® Development Platform memory can be
extended if required by adding SRAM devices. U19, U18, and U17 pro-
vide this capability. However, the user should be aware that additional
SRAM must be installed in the following order:
1. U19, address range B00000h – B7FFFFh
2. U18, address range A80000h – AFFFFFh
3. U17, address range A00000h – A7FFFFh
If SRAM memory is installed in a different order than the above
sequence, SRAM will not be contiguous unless the user is able to change
the address decoder, U10. Memory access decoding is performed by this
address decoder, implemented in the Generic Array Logic device,
GAL22LV10D (U10).
Memory Map
A memory map of the eZ80 ® CPU is illustrated in Figure 10. Flash mem-
ory and SRAM on the eZ80190 Module are addressed when CS0 and CS1
are active Low. SRAM on the eZ80Acclaim!
® Development Platform is
addressed when CS2 is active Low.