Altera PowerPlay Early Power Estimator - Manual (Page 17)

Altera Corporation UG-FPGAPWRCAL-2.0 3–1
October 2005 Preliminary
3. Using PowerPlay Early
Power Estimator for Stratix,
Stratix GX & Cyclone FPGAs
PowerPlay Early
Power Estimator
Input Values The sections in the PowerPlay early power estimator that estimate I
CC
and
power represent an architectural feature of the device, such as the
clocktree network, RAM blocks, or digital signal processing (DSP) blocks.
The sub-total of the I
CC
and power consumed by each architectural
feature is reported in each section in milli-Amps (mA) and milli-Watts
(mW).
The following sections of this user guide explain what values you need to
enter for each section of the PowerPlay early power estimator. Sections in
the PowerPlay early power estimator calculate power representing
architectural features of the device, such as clocks, RAM blocks, or DSP
blocks. Each section also provides an example of how you would enter
the relevant information into the PowerPlay early power estimator.
Device
Different Stratix ® , Stratix GX, or Cyclone ™ devices consume different
amounts of power for the same design in a similar condition. The larger
the device, the more power it consumes because of the larger die and
longer interconnects in the device.
In the Device section of the PowerPlay early power estimator, select the
target device with the corresponding package and temperature grade
used in your design (
Figure 3–1 ). The total power for both the logic array
and I/O pins are reported in this section.