Altera PowerPlay Early Power Estimator - Manual (Page 12)

2–4 UG-FPGAPWRCAL-2.0 Altera Corporation
PowerPlay Early Power Estimator User Guide: Stratix, Stratix GX & Cyclone FPGAs October 2005
Estimating Power
Figure 2–2. Import Data Dialog Box
1
After running the Import Data macro, you must manually select
the appropriate RAM block mode in the Mode column of the
RAM Blocks
section.
The f
MAX
imported into the PowerPlay early power estimator is the same
as the f
MAX
reported in the Quartus II timing analyzer. You can manually
edit the f
MAX
and toggle percentage in the PowerPlay early power
estimator to suit your system requirements.
If your design has more than 10 design modules, the Import Data macro
instructs you to check the <project name>_early_pwr_errors
pwr_est_errors.txt
file for errors. You should verify that the entries in the
PowerPlay power estimation file are valid design modules. If they are
valid design modules, manually enter these resources into the PowerPlay
early power estimator.
You can merge similar design modules into one common row entry. For
example, if the f
MAX
for one logic element (LE) design module is only
slightly higher or lower than another, you can enter this information into
one row in the PowerPlay early power estimator by entering the higher
f
MAX
and adding the LE resources used. If the design modules are
completely different, you can manually enter the additional design
modules into another copy of the PowerPlay early power estimator. You
can also enter the 10 design modules that use the most resources for an
estimation.
Estimating
Power You can estimate power at any point in your design cycle. You can use the
PowerPlay early power estimator to estimate the power consumption if
you have not begun your design, or if your design is not complete. After
completing your design, you can use the simulation-based power
estimation feature in Quartus II software or the PowerPlay early power
estimator to estimate the power consumption.
p