Core worksheet, Clock section, Core worksheet –6 – Altera PowerPlay Early Power Estimator for Altera CPLDs User Manual
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Chapter 2: PowerPlay Early Power Estimator Worksheets
Power Estimation Using the PowerPlay Early Power Estimator
PowerPlay Early Power Estimator for Altera CPLDs User Guide
December 2010
Altera Corporation
Core Worksheet
The Core worksheet of the PowerPlay EPE spreadsheet includes the clock, logic, and
user flash memory (UFM) sections.
Clock Section
MAX II and MAX V devices have four global clocks each. Each row in the Clock
worksheet of the PowerPlay EPE spreadsheet represents a clock network or a separate
clock domain. Enter the following parameters for each design module:
■
Clock frequency (in MHz)
■
Total fanout for each clock network you use
■
Local clock enable percentage
shows the Clock section in the PowerPlay EPE spreadsheet.
lists the values you must specify in the Clock section of the PowerPlay EPE
spreadsheet.
Figure 2–4. Clock Section in the PowerPlay EPE Spreadsheet
Table 2–6. Clock Section Information
Column Heading
Description
Clock Domain
Specify a name for the clock network in this column. This is an optional value.
Clock Freq (MHz)
Enter the frequency of the clock domain. This value is limited by the maximum frequency
specification for the device family.
Total Fanout
Enter the total number of LE flipflops fed by this clock. The number of resources driven by
every global clock is reported in the Fan-out column of the Quartus II Compilation Report. In
the Compilation Report, select Filter and click Resources Section. Select Global and Other
Fast Signals and click Fan-out.
Local Enable %
Enter the average percentage of time that clock enable is high for the destination flipflops.
Local clock enables for flipflops in LEs are promoted to logic array block (LAB)-wide signals.
When you disable a given flipflop, the LAB-wide clock is disabled, cutting clock power and the
power for down-stream logic. This worksheet models only have impact on the clock tree
power.
Total Power (mW)
This is the total power dissipation due to clock distribution.
User Comments
Enter any comments. This is an optional value.