Nco multichannel design example, Nco multichannel design example -1 – Altera NCO MegaCore Function User Manual
Page 31
NCO Multichannel Design Example
4
2014.12.15
UG-NCO
Often in a system where the clock frequency of the design is much higher than the sampling frequency,
you can time share some of the hardware.
Consider a system with a clock frequency of 200 MHz and a sampling rate of 50 MSPS (Megasamples per
second). You can generate four complex sinusoids using a single instance of the NCO IP core.
Example design 3 generates four multiplexed and demultiplexed streams of complex sinusoids, which you
can use in a digital up- or down-converter design.
Figure 4-1: Multichannel NCO Example Design
Counter
phi_ch0
phi_ch1
phi_ch2
phi_ch3
fmod_ch0
fmod_ch1
fmod_ch2
fmod_ch3
pmod_ch0
pmod_ch1
pmod_ch2
pmod_ch3
sin_ch0
sin_ch1
sin_ch2
sin_ch3
cos_ch0
cos_ch1
cos_ch2
cos_ch3
startofpacket
endofpacket
valid
fsin_o
fcos_o
phi_inc_i
req_mode_i
phase_mod_i
fsin_o
fcos_o
out_valid
Avalon-Streaming
Counter
NCO
The design also generates five output signals (
valid
,
startofpacket
,
endfopacket
,
fsin_o
and
fcos_o
)
that the Avalon-ST interface uses.
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