Altera DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP - Manual (Page 3)

Chapter 15: Introduction to ALTMEMPHY IP 15–3
Device Family Support
November 2012 Altera Corporation External Memory Interface Handbook
Volume 3: Reference Material
Device Family Support
Table 15–2 defines the device support levels for Altera IP cores.
Table 15–3 shows the level of support offered by the DDR, DDR2, and DDR3 SDRAM
Controllers with ALTMEMPHY IP for Altera device families.
Table 15–2. Altera IP Core Device Support Levels
FPGA Device Families HardCopy Device Families
Preliminary support—The IP core is verified with
preliminary timing models for this device family. The IP core
meets all functional requirements, but might still be
undergoing timing analysis for the device family. It can be
used in production designs with caution.
HardCopy Companion—The IP core is verified with
preliminary timing models for the HardCopy companion
device. The IP core meets all functional requirements, but
might still be undergoing timing analysis for the HardCopy
device family. It can be used in production designs with
caution.
Final support—The IP core is verified with final timing
models for this device family. The IP core meets all
functional and timing requirements for the device family and
can be used in production designs. HardCopy Compilation—The IP core is verified with final
timing models for the HardCopy device family. The IP core
meets all functional and timing requirements for the device
family and can be used in production designs.
Table 15–3. Device Family Support
Device Family
Protocol
DDR and DDR2 DDR3
Arria ® GX Final No support
Arria II GX Final Final
Cyclone
®
III Final No support
Cyclone III LS Final No support
Cyclone IV E Final No support
Cyclone IV GX Final No support
HardCopy II
Refer to the What’s New in Altera
IP page of the Altera website.
No support
Stratix ® II Final No support
Stratix II GX Final No support
Other device families No support No support