ADLINK PCI-9846 - Manual (Page 8)

iv List of Figures
List of Figures
Figure 1-1: PCI/PXI-9816 Bandwidth Chart
(50 Ω input impedance) ............................................. 6
Figure 1-2: PCI/PXI-9826 Bandwidth Chart
(50 Ω input impedance) ............................................. 6
Figure 1-3: PXI-9846 Bandwidth Chart (50 Ω input impedance).. 7
Figure 1-4: PXI-9816 FFT with ±0.2 V Input Range..................... 8
Figure 1-5: PXI-9816 FFT with ±1 V Input Range........................ 9
Figure 1-6: PXI-9826 FFT with ±0.2 V Input Range................... 10
Figure 1-7: PXI-9826 FFT with ±1 V Input Range...................... 11
Figure 1-8: PXI-9846 FFT with ±0.2 V Input Range................... 12
Figure 1-9: PXI-9846 FFT with ±1 V Input Range...................... 13
Figure 2-1: PXI-98x6 Mechanical Drawing................................. 21
Figure 2-2: PCI-98x6 Mechanical Drawing ................................ 21
Figure 2-3: DAQPilot Main Interface .......................................... 24
Figure 2-4: DAQMaster Device Manager................................... 25
Figure 2-5: Legacy Software Support Overview ........................ 26
Figure 3-1: PXI-98x6 Functional Block Diagram ....................... 27
Figure 3-2: PCI-98x6 Functional Block Diagram........................ 27
Figure 3-3: Analog Input Signal Block Diagram ......................... 28
Figure 3-4: Basic Acquisition Timing Of Digitizer ....................... 30
Figure 3-5: PCI/PXI-98x6 Timebase Source and Architecture... 31
Figure 3-6: Configuring Different Sampling Rate of a Digitizer. . 33
Figure 3-7: PCI/PXI-98x6 Trigger Architecture .......................... 34
Figure 3-8: External Digital Trigger Polarity
and Pulse Width Requirement. ................................ 35
Figure 3-9: Analog Trigger Conditions ....................................... 37
Figure 3-10: TRG IO Output Signal Timing.................................. 38
Figure 3-11: Post-trigger Acquisition............................................ 39
Figure 3-12: Pre-trigger Mode Operation ..................................... 40
Figure 3-13: Pre-trigger Mode Operation ..................................... 40
Figure 3-14: Middle-trigger Mode Operation ................................ 41
Figure 3-15: Delay-trigger Mode Operation ................................. 41
Figure 3-16: Re-trigger Mode Operation. ..................................... 42
Figure 3-17: Scatter-Gather DMA for Data Transfer .................... 43
Figure 3-18: SSI Architecture....................................................... 45
Figure 3-19: SSI Connector Location on the PCI-9816/26/46...... 46
Figure 3-20: Installation of ACL-SSI-2 Cable ............................... 46
Figure 3-21: SSI_TRIG1 Input and Output Timing