ADLINK PXI-2208 - Manual (Page 95)

Operation Theory 83
In PXI form factor, we utilize the PXI trigger bus built on the PXI
backplane to provide the necessary timing signal connections. All
the SSI signals are routed to the P2 connector. No additional cable
is needed. For detailed information of the PXI specifications, refer
to the PXI Specification Revision 2.0 from PXI System Alliance
(www.pxisa.org).
The six internal timing signals could be routed to the SSI or the
PXI trigger bus through software drivers. Refer to section 4.6 for
detailed information on the six internal timing signals. Physically,
the signal routings are accomplished in the FPGA. Cards that are
connected together through the SSI or the PXI trigger bus, will still
achieve synchronization on the six timing signals.