Maxim Integrated 78Q8430 Software Driver - Manual (Page 31)

UG_8430_004 78Q8430 Software Driver Development Guidelines
Rev. 1.0 31
STEP 5: Use SNOOP access to retrieve the hardware and protocol source address fields.
The protocol source address is contained in SNOOP address 0x320. The hardware source address
is contained in SNOOP address 0x31C plus the two MSBs of SNOOP address 0x318. There is no
need to read address 0x318 since it was already read in STEP 3.
STEP 6: Set the destination address and source address fields in the frame.
Write the hardware source address retrieved in STEP 5 and the MAC address of this interface to the
destination and source address fields, respectively, using SNOOP addresses 0x304, 0x308 and
0x30C.
STEP 7: Set the Opcode field and the hardware and protocol address fields in the frame.
SNOOP addresses 0x318, 0x31C, 0x320, 0x324, 0x328 and 0x32C are written with the response
Opcode field set to 0x0002, the MAC address for this interface, the IP address gathered in STEP 4,
the hardware source address and the protocol source address gathered in STEP 5 respectively. In
other words, the source and destination addresses are swapped and the opcode is changed from a
request to a response.
STEP 8: Set the transmit options for the ARP response.
The value normally written to the PCWR is written to SNOOP address 0x300 instead. The driver
should set the PCWR Fix CRC bit because the existing CRC is incorrect after the changes made in
this procedure. The driver may also wish to use a unique ID for this frame so that it does not try to
free any buffers when it retrieves the transmit status for this frame.
STEP 9: Transfer the frame from the receive QUE to transmit QUE 3.
Set the RTTR Transfer bit to enable the transfer. The RTTR Transfer bit is self-clearing. When the
bit is clear, it indicates that the First BLOCK from QUE 0 is now the last BLOCK in QUE 3. For
frames that are 252 bytes or smaller in length, only one transfer is required. If the frame size is
greater, more than one transfer will be required. The transfer of a single BLOCK should complete
quickly. The driver must ensure that no data is read from QUE 0 RDR until the transfer operation is
complete.
This procedure assumes that the driver has determined in advance that the next frame in the receive
QUE is an ARP frame, or specifically, an ARP request. This can be done using classification or through
inspection. The driver can read a portion of the frame in the standard way and the BLOCK will still be
available for a transfer operation. However, once the first 252 bytes of the frame have been read, or the
entire frame contents have been read, which ever comes first, the BLOCK is no longer available for a
transfer operation.
If the ARP request is VLAN tagged, the procedure must be modified to account for the additional VLAN
data in the Ethernet frame. To accomplish this, the SNOOP addresses in all STEPS except those in
STEP 6 must be incremented by four.
5.4.2 Transmit ICMP Echo Reply
This section describes how to configure the CAM filters to enable recognition of ICMP frames and how to
process the ICMP echo reply using the Snoop feature to access the ICMP frame.
Table 6 illustrates the contents of an ICMP frame. The bottom row of the table contains the SNOOP
addresses used to access the ICMP frame fields above them. All values in the table are hexadecimal.