Digilent MX4cK - Manual (Page 13)

Cerebot MX4cK Reference Manual
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PIC32 Peripheral Devices
The following describes the peripheral devices
available in the PIC32MX460F512L
microcontroller and how they are accessed on
the Cerebot MX4cK board.
CPU Clock Source
The PIC32 microcontroller supports numerous
clock source options for the main processor
operating clock. The Cerebot MX4ck board is
designed to support either a silicon resonator
from Discera, IC8, for use with the EC
oscillator option, or an external crystal for use
with the XT oscillator option. Standard
production boards will have an 8Mhz Discera
silicon resonator loaded and the EC oscillator
option should be used. If IC2 is not loaded, an
8Mhz crystal will be loaded for X1 (on the
bottom of the board) and the XT oscillator
option should be used. Oscillator options are
selected via the configuration variables
specified using the #pragma config statement.
Use
#pragma config POSCMOD=EC to select
the EC option and #pragma config
POSCMOD=XT to select the XT option.
Using the internal system clock phase-locked
loop (PLL), it is possible to select numerous
multiples or divisions of the 8Mhz input
frequency to produce CPU operating
frequencies up to 80Mhz. The clock circuit PLL
provides an input divider, multiplier, and output
divider. The external clock frequency (8Mhz) is
first divided by the selected input divider value.
This is multiplied by the selected multiplier
value and then finally divided by the selected
output divider. The result is the system clock,
SYSCLK, frequency. The SYSCLK frequency
is used by the CPU, DMA controller, interrupt
controller and pre-fetch cache.
The values controlling the operating frequency
are specified using the PIC32MX460
configuration variables. These are set using
the #pragma config statement. Use
#pragma config FPLLIDIV to set the input
divider, #pragma config FPLLMUL to set
the multiplication factor and #pragma config
FPLLODIV
to set the output divider. Refer to
the PIC32MX3XX/4XX Family Data Sheet and
the PIC32MX Family Reference Manual,
Section 6. Oscillators, for information on how
to choose the correct values, as not all
combinations of multiplication and division
factors will work.
In addition to configuring the SYSCLK
frequency, the peripheral bus clock, PBCLK,
frequency is also configurable. The peripheral
bus clock is used for most peripheral devices,
and in particular is the clock used by the
timers, and serial controllers (UART, SPI, I2C).
The PBLCK frequency is a division of the
SYSCLK frequency selected using #pragma
config FPBDIV
. The PBCLK divider can be
set to divide by 1, 2, 4, or 8 using the values
DIV_1, DIV_2, DIV_4 or DIV_8.
The following example will set up the Cerebot
MX4cK for operation using the Discrea silicon
resonator with a SYSCLK frequency of 80Mhz
and a PBCLK frequency of 10Mhz:
#pragma config FNOSC = PRIPLL
#pragma config POSCMOD = EC
#pragma config FPLLIDIV = DIV_2
#pragma config FPLLMUL = MUL_20
#pragma config FPLLODIV = DIV_1
#pragma config FPBDIV = DIV_8
Documentation for the PIC32 configuration
variables can be found in the PIC32MX
Configuration Settings guide. This is found
using the “Help.Topics…” command in the
MPLAB IDE. Also, refer to Appendix B for an
example of setting the configuration variables.
When using the Cerebot MX4cK with the
chipKIT MPIDE software, the clock source is
set by the boot loader and no action is
required.