Digilent Parallel Interface Model User Manual
Digilent Hardware
D
D
i
i
g
g
i
i
l
l
e
e
n
n
t
t
P
P
a
a
r
r
a
a
l
l
l
l
e
e
l
l
I
I
n
n
t
t
e
e
r
r
f
f
a
a
c
c
e
e
M
M
o
o
d
d
e
e
l
l
R
R
e
e
f
f
e
e
r
r
e
e
n
n
c
c
e
e
M
M
a
a
n
n
u
u
a
a
l
l
www.digilentinc.com
Revision: 08/10/2004
246 East Main | Pullman, WA 99163
(509) 334 6306 Voice and Fax
Copyright Digilent, Inc.
11 pages
Doc: 560-000
Introduction
The Digilent Communications Interface DLL, dpcutil.dll, provides a set of API functions for applications
programs running on a Microsoft Windows based computer to exchange data with logic implemented
in a Digilent system board. Various Digilent applications programs, such as Transport component of
the Adept Suite, depend on the data interchange API functions in dpcutil. The operation of these
functions depends on the presence of a Digilent communications subsystem component running the
appropriate firmware and the implementation of the appropriate interface logic in the gate array. This
document describes the functional requirements of the communications interface logic and provides a
sample implementation.
The logic described in this document implements are set of registers in the gate array. An application
on the host PC exchanges data with the design in the gate array by reading or writing these registers.
Digilent Communications Interface modules implement the interface described in this document to
control the reading and writing of these registers.
Functional Description
The Digilent Port Interface is patterned after the EPP mode of the parallel port interface on an IBM PC
type computer. This interface provides an 8 bit bi-directional parallel data bus and six handshaking
lines to control the data transfer. The actual data transfer speed that can be achieved depends on the
particular communications subsystem and firmware version being used.
The parallel port interface is made up of an eight bit wide address register and a set of eight bit wide
data registers. The address register holds the address of the data register currently being accessed.
Access to the registers is accomplished via transfer cycles. The four types of transfer cycles allowed
are: address read, address write, data read, and data write. Address read and address write cycles
read from or write to the address register. Data read and data write cycles read or write the data
register whose address is currently held in the address register.
The address register can be implemented with any number of bits up to the maximum size of eight
bits. Since the maximum size of the address register is eight bits, the maximum number of data
registers that can be implemented is 256. It isn’t necessary to implement all 256 possible data
registers. Only the registers needed for a particular application need to be implemented. It is
necessary for the application program using the interface to know which data registers are
implemented and what functions the implemented data registers perform.
Signal Descriptions
In the following description, the term host represents the host PC running the dpcutil application.
Signals sourced by the host are generated by the Digilent communication interface and are inputs to
the logic in the gate array. The term peripheral refers to the logic implemented in the gate array of the
system board. Signals sourced by the peripheral are outputs from the logic implemented in the gate
array.
The following signals make up the interface:
Name
Source
Description
DB0 – DB7
bidir
Data bus. The host is the source during write cycles and the
peripheral is the source during read cycles.
WRITE
host
Transfer direction control. High = read, Low = write