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Kontron COMe-cSP2 User Manual

Page 22

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COMe-cSP2

/ COMe-cSP2 Connector



17

A45

USB0-

USB Data- Port #0

DP-I/O

PD 15k in US15W

-

A46

USB0+

USB Data+ Port #0

DP-I/O

PD 15k in US15W

-

A47

VCC_RTC

RTC Power Supply +3V

PWR

-

-

A48

EXCD0_PERST#

PCIe Express Card 0 Reset

O-3.3

-

-

A49

EXCD0_CPPE#

PCIe Express Card 0 Request

I-3.3

PU 8k2 3.3V

-

A50

LPC_SERIRQ

LPC Serial Interrupt Request

IO-3.3

PU 8k2 3.3V

-

A51

GND_6

Power Ground

PWR

-

-

A52

PCIE_TX5+

PCIe lane #5 Transmit+

nc

-

not supported

A53

PCIE_TX5-

PCIe lane #5 Transmit-

nc

-

not supported

A54

SDIO_D0
GPI0

SDIO#0 Data0
General Purpose Input 0

I/O-3.3
I-3.3

PU 75k in US15W
PU 10k 3.3V

Bus Switch
PI5C3390

A55

PCIE_TX4+

PCIe lane #4 Transmit+

DP-O

-

PCIe Bridge

A56

PCIE_TX4-

PCIe lane #4 Transmit-

DP-O

-

PCIe Bridge

A57

GND_7

Power Ground

PWR

-

-

A58

PCIE_TX3+

PCIe lane #3 Transmit+

DP-O

-

PCIe Bridge

A59

PCIE_TX3-

PCIe lane #3 Transmit-

DP-O

-

PCIe Bridge

A60

GND_8

Power Ground

PWR

-

-

A61

PCIE_TX2+

PCIe lane #2 Transmit+

DP-O

-

PCIe Bridge

A62

PCIE_TX2-

PCIe lane #2 Transmit-

DP-O

-

PCIe Bridge

A63

SDIO_D1
GPI1

SDIO#0 Data1
General Purpose Input 1

I/O-3.3
I-3.3

PU 75k in US15W
PU 10k 3.3V

Bus Switch
PI5C3390

A64

PCIE_TX1+

PCIe lane #1 Transmit+

DP-O

-

PCIe Bridge

A65

PCIE_TX1-

PCIe lane #1 Transmit-

DP-O

-

PCIe Bridge

A66

GND_9

Power Ground

PWR

-

-

A67

SDIO_D2
GPI2

SDIO#0 Data2
General Purpose Input 2

I/O-3.3
I-3.3

PU 75k in US15W
PU 10k 3.3V

Bus Switch
PI5C3390

A68

PCIE_TX0+

PCIe lane #0 Transmit+

DP-O

PU 50R inUS15W

-

A69

PCIE_TX0-

PCIe lane #0 Transmit-

DP-O

PU 50R inUS15W

-

A70

GND_10

Power Ground

PWR

-

-

A71

LVDS_A0+

LVDS Channel A (positive)

DP-O

PU 50R inUS15W

-

A72

LVDS_A0-

LVDS Channel A (negative)

DP-O

PU 50R inUS15W

-

A73

LVDS_A1+

LVDS Channel A (positive)

DP-O

PU 50R inUS15W

-

A74

LVDS_A1-

LVDS Channel A (negative)

DP-O

PU 50R inUS15W

-

A75

LVDS_A2+

LVDS Channel A (positive)

DP-O

PU 50R inUS15W

-

A76

LVDS_A2-

LVDS Channel A (negative)

DP-O

PU 50R inUS15W

-

A77

LVDS_VDD_EN

LVDS Panel Power Control

O-3.3

PD 100k

A78

LVDS_A3+

LVDS Channel A (positive)

DP-O

PU 50R inUS15W

-

A79

LVDS_A3-

LVDS Channel A (negative)

DP-O

PU 50R inUS15W

-

A80

GND_11

Power Ground

PWR

-

-

A81

LVDS_A_CK+

LVDS Channel A Clock+

DP-O

PU 50R inUS15W

-

A82

LVDS_A_CK-

LVDS Channel A Clock-

DP-O

PU 50R inUS15W

-

A83

LVDS_I2C_CK

LVDS I2C Clock (DDC)

IO-3.3

PU 10k 3.3V

-

A84

LVDS_I2C_DAT

LVDS I2C Data (DDC)

IO-3.3

PU 10k 3.3V

A85

SDIO_D3
GPI3

SDIO# Data3
General Purpose Input 3

I/O-3.3
I-3.3

PU 75k in US15W
PU 10k 3.3V

Bus Switch
PI5C3390

A86

KBD_RST#

Keyboard Reset

I-3.3

PU 10k 3.3V

-

A87

KBD_A20GATE

A20 gate

I-3.3

PU 10k 3.3V

-

A88

PCIE0_CK_REF+

PCIe Clock (positive)

DP-O

-

100MHz

A89

PCIE0_CK_REF-

PCIe Clock (negative)

DP-O

-

100MHz

A90

GND_12

Power Ground

PWR

-

-