Rockwell Automation 1747-DCM,D17476.8 Direct Communication Module - Manual (Page 43)

6 Chapter
6–1
Programming
This chapter shows you how to program ladder logic in the supervisory
processor/scanner and the distributed SLC to transfer data via the DCM.
Topics include:
•
overview
•
programming examples
•
status words
•
applications using status word bits
Both the supervisory processor/scanner and the distributed SLC transfer data
to and from the DCM automatically via their I/O and the RIO scan. The
DCM, as a common memory site for both supervisory and distributed
processors, has two addresses; one for the supervisory processor/
scanner and one for the SLC. The supervisory processor/scanner address is
the DCM logical rack address as set by DCM SW-1 switches 1 through 6.
The distributed SLC address is determined by the slot where the DCM is
physically installed.
The supervisory processor/scanner and distributed SLC addresses can be
different; however, the bit position part in each word must be the same.
In the programming examples on the following page, an Examine If Open
contact similar to the one shown below is used in each output rung:
]/[
I:4.0
08
This instruction checks that the Logical OR bit of the status word is false.
Whenever any of the status word bits (except the User Status Flag bit) is set,
it is indication that a condition has occurred in your logic program that may
require inspection. If this happens you would normally want to inhibit some
outputs by using a ladder logic instruction. Using an Examine If Open (XIO)
instruction examining the Logical OR bit (word 0, bit 8 for SLC; word 0, bit
10 for PLC) is the easiest way of doing this.
Overview