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Switching characteristics (continued), Cs5566, Switching characteristics – Cirrus Logic CS5566 User Manual

Page 8

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CS5566

8

DS806PP2

5/4/09

SWITCHING CHARACTERISTICS

(CONTINUED)

T

A

= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;

VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V Low; Logic 1 = VD+ = High; CL = 15 pF.

13.

SDO and SCLK will be high impedance when CS is high. In some systems SCLK and SDO may require pull-down

resistors.

14.

SCLK = MCLK/2.

Parameter

Symbol Min

Typ

Max

Unit

Serial Port Timing in SSC Mode (SMODE = VL)

Data hold time after SCLK rising

t

7

-

10

-

ns

Serial Clock (Out)

Pulse Width (low)

(Note 13, 14)

Pulse Width (high)

t

8

t

9

100
100

-
-

-
-

ns
ns

RDY rising after last SCLK rising

t

10

-

8

-

MCLKs

CS falling to MSB stable

t

11

-

10

-

ns

First SCLK rising after CS falling

t

12

-

8

-

MCLKs

CS hold time (low) after SCLK rising

t

13

10

-

-

ns

SCLK, SDO tri-state after CS rising

t

14

-

5

-

ns

MCLK

RDY

SCLK(o)

SDO

CS

t

12

t

8

t

13

t

9

t

7

t

11

MSB

MSB1

LSB

LSB+1

t

14

t

10

Figure 3. SSC Mode - Read Timing, CS falling after RDY falls (Not to Scale)