Cirrus Logic CS5566 - Manual (Page 7)

CS5566
DS806PP2 7
5/4/09
SWITCHING CHARACTERISTICS
(CONTINUED)
T
A
= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;
VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V Low; Logic 1 = VD+ = High; CL = 15 pF.
11. SDO and SCLK will be high impedance when CS is high. In some systems it may require a pull-down resistor.
12. SCLK = MCLK/2.
Parameter Symbol Min Typ Max Unit
Serial Port Timing in SSC Mode (SMODE = VL)
RDY falling to MSB stable t
1
- -2 - MCLKs
Data hold time after SCLK rising t
2
- 10 - ns
Serial Clock (Out) Pulse Width (low)
(Note 11, 12) Pulse Width (high)
t
3
t
4
100
100 -
- -
- ns
ns
RDY rising after last SCLK rising t
5
- 8 - MCLKs
MCLK
RDY
SCLK(o)
SDO MSB MSB–1 LSB LSB+1
CS
t
1
t
2
t
3
t
4
t
5
Figure 2. SSC Mode - Read Timing, CS remaining low (Not to Scale)