Cirrus Logic CS42L73 - Manual (Page 39)

DS882F1 39
CS42L73
SWITCHING SPECIFICATIONS—SERIAL PORTS—PCM FORMAT
Test condition: Inputs: Logic 0 = GND = DGND = 0 V, Logic 1 = VL; T
A
= +25 C; x = X or V; xSP_LRCK, xSP_SCLK, xSP_
SDOUT; C
LOAD
= 15 pF.
Parameters (Note 2) Symbol Min Max Units
Slave Mode
Input Sample Rate (xSP_LRCK)
(Note 24) (Note 53) Fs
ext-s
- 50 kHz
xSP_LRCK Duty Cycle - 45 55 %
xSP_SCLK Frequency (Note 10) 1/t
Ps
- 68•Fs Hz
xSP_SCLK Duty Cycle - 45 55 %
xSP_LRCK Setup Time Before xSP_SCLK Falling Edge t
ss(LK-SK)
40 - ns
xSP_LRCK Hold Time After xSP_SCLK Falling Edge t
hs(SK-LK)
20 - ns
xSP_SDOUT Setup Time Before xSP_SCLK Falling Edge t
ss(SDO-SK)
20 - ns
xSP_SDOUT Hold Time After xSP_SCLK Falling Edge t
hs(SK-SDO)
30 - ns
xSP_SDIN Setup Time Before xSP_SCLK Falling Edge t
ss(SDI-SK)
20 - ns
xSP_SDIN Hold Time After xSP_SCLK Falling Edge t
hs(SK-SDI)
20 - ns
t
hs(SK-SDO)
//
t
ss(SDI-SK)
xSP_LRCK
xSP_SCLK
xSP_SDOUT
xSP_SDIN
t
Ps
t
hs(SK-SDI)
t
ss(SDO-SK)
t
ss(LK-SK)
t
hs(SK-LK)
Note:
x = X, A, or V
Figure 13. Serial Port Interface Timing—PCM Format