5 register maps tab, Figure 5. register maps tab - cs42l51, Cdb42l51 – Cirrus Logic CDB42L51 User Manual

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DS679DB2

CDB42L51

2.5

Register Maps Tab

The Advanced Register Debug tab provides low-level control of the CS42L51 individual register settings.
Register values can be modified bit-wise or byte-wise. For bit-wise, click the appropriate push-button for the
desired bit. For byte-wise, the desired hex value can be typed directly into the register address box in the
register map. The “FPGA” and “GPIO” tabs may be ignored.

Figure 5. Register Maps Tab - CS42L51