IEI Integration PCIE-Q350 v1.20 - Manual (Page 58)

PCIE-Q350 PICMG 1.3 CPU Card
Page 37
Some of the Super I/O features are described in more detail below:
2.8.3.1 Super I/O LPC Interface
The LPC interface on the Super I/O complies with the Low Pin Count Specification Rev.
1.0. The LPC interface supports both LDRQ# and SERIRQ protocols as well as PCI PME#
interfaces.
2.8.3.2 Super I/O 16C550 UARTs
The onboard Super I/O has two integrated 16C550 UARTs that can support the following:
Two standard serial ports (COM1 and COM2)
IrDa 1.0 and ASKIR protocols
2.8.3.3 Super I/O Enhanced Hardware Monitor
The Super I/O Enhanced Hardware Monitor monitors three thermal inputs, VBAT
internally, and eight voltage monitor inputs. These hardware parameters are reported in
the BIOS and can be read from the BIOS Hardware Health Configuration menu.
2.8.3.4 Super I/O Fan Speed Controller
The Super I/O fan speed controller enables the system to monitor the speed of the fan.
One of the pins on the fan connector is reserved for fan speed detection and interfaced to
the fan speed controller on the Super I/O. The fan speed is then reported in the BIOS.
2.8.3.5 Super I/O Keyboard and Mouse Controller
The Super I/O keyboard and mouse controller is compatible with the following
specifications.
8042 compatible
Asynchronous access to two data registers and one status register
Compatible with 8042 software
PS/2 mouse supported
Port 92 supported