Teledyne LeCroy QPHY-DDR2 - Manual (Page 42)

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QPHY-DDR2-OM-E Rev A
Prerequisite: tERR(6-10per), a derating factor is applied to the limit depending on the clock jitter. This is
applicable to 667 and 800 MHz device only for both of the following tests.
tHZ(DQ), DQ High Impedance Time From CK/CK#
This is the time from Vref of the CK/CK# signal to the point when the DQ is not being driven anymore (at the end
of the burst)
tLZ(DQ), DQ Low-Impedance Time from CK/CK#
This is the time from when the DQ begins to be driven (at the beginning of the burst) to the nearest CK/CK# edge.
tLZ(DQS), DQS Low-Impedance Time from CK/CK#
This is the time from when the DQS begins to be driven (at the beginning of the preamble) to the nearest CK/CK#
edge.
tRPRE, Read Preamble
Time from when DQS begins to be driven (at the beginning of the preamble) to when it crosses Vref. This is only
measured on a read cycle.
Prerequisite: tJIT(per), a derating factor is applied to the limit depending on the clock jitter. This is applicable to
667 and 800 MHz device only.
tRPST, Read Postamble
Time from when DQS crosses Vref (at the beginning of the postamble) to when DQS stops being driven (at the
end of the postamble). This is only measured on a read cycle.
Prerequisite: tJIT(duty), a derating factor is applied to the limit depending on the clock jitter. This is applicable to
667 and 800 MHz device only.