Teledyne LeCroy QPHY-DDR2 - Manual (Page 33)

QPHY-DDR2 Software Option
QPHY-DDR2-OM-E Rev A
33
Configuration Specific Variables
The following variables are specific to the configuration in which they appear under. Some of these variables
appear under multiple configurations.
XX Channel Gain
Allows the user to manually specify the vertical scale in V/div for XX SUT. XX can be Clock, DQ, DQS, DQSn,
ADD/CTRL, or DM. Default is 0 for auto-scale.
XX Channel Index
Allows the user to manually specify the channel XX SUT. XX can be Clock, DQ, DQS, DQSn, ADD/CTRL, or DM.
Default is 1 for CK, 2 for DQS, 3 for DQ and 4 for others
XX Channel Invert
Allows the user to invert XX SUT. XX can be Clock, DQ, DQS, DQSn, ADD/CTRL, or DM. Default is False.
XX Channel Offset
Allows the user to manually specify the offset in Volts for XX SUT. XX can be Clock, DQ, DQS, DQSn,
ADD/CTRL, or DM. Default is 0 for auto-scale.
Select Signal Under Test if many
These variables allow the user to specify which signals to tests for particular tests. The default state is to tests all
of the pertinent signals. For the ADD/CTRL tests the default is ADD and for the DM tests the default is DM
Previously measured tHP in seconds
tHP is usually computed from the result of test tCH/tCL. However if a result is not available, the value entered
here is used. If this variable is set to 0, then tHP is computed from the DUT Speed Grade in MT/s.
Max Overshoot Peak Amplitude
For address and control signals, the maximum requirements for peak amplitude were reduced from 0.9V to 0.5V.
Default value is 0.5 V.
Note: Register vendor data sheets specify the maximum over/undershoot induced in specific RDIMM applications. DRAM vendor data sheets
also specify the maximum overshoot/undershoot that their DRAM can tolerate. This allows the RDIMM supplier to understand whether the
DRAM can tolerate the overshoot that the register induces in the specific RDIMM.