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Block diagram – Atec Agilent-N5072A Series User Manual

Page 17

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17

Block Diagram

R1

A

R2

B

Port 1

Port 2

RC

V

R

R1

IN

SO

U

R

CE

O

U

T

CP

LR

T

H

R

U

SO

U

R

CE

O

U

T

RC

V

R

A

IN

CP

LR

A

R

M

RC

V

R

B I

N

CP

LR

A

R

M

CP

LR

T

H

R

U

SO

U

R

CE

O

U

T

RC

V

R

R2

IN

SO

U

R

CE

O

U

T

Source

SPDT Switch

Solid-state

AƩenuator

(65 dB)

Mechanical Step

AƩenuator

(60 dB,

10 dB step)

Bias-Tee

Bias-Tee

Mechanical Step

AƩenuator

(60 dB,

10 dB step)

REF 1

REF 2

EMC, safety, environment and compliance

Description

Specification

EMC

European Council Directive 2004/108/EC
IEC 61326-1:2005
EN 61326-1:2006
CISPR 11:2003+A1:2004
EN 55011:2007
Group 1, Class A
IEC 61000-4-2:1995 +A2:2000
EN 61000-4-2:1995 +A2:2001
4 kV CD/8 kV AD
IEC 61000-4-3:2006
EN 61000-4-3:2006
1-3 V/m, 80-1000 MHz/1.4 GHz - 2.7 GHz, 80% AM
IEC 61000-4-4:2004
EN 61000-4-4:2004
1 kV power lines/0.5 kV signal lines
IEC 61000-4-5:2005
EN 61000-4-5:2006
0.5 kV line-line/1 kV line-ground
IEC 61000-4-6:2003 + A1:2004+ A2:2006
EN 61000-4-6:2007
3 V, 0.15-80 MHz, 80% AM
IEC 61000-4-11:2004
EN 61000-4-11:2004
0.5-300 cycle, 0%/70%

ICES-001:2006 Group 1, Class A

AS/NZS CISPR11:2004 Group 1, Class A