Atec Acterna-JDSU-ANT-20SE - Manual (Page 3)

Specifications ANT-20SE SONET
ANT-20SE Mainframe BN 3060/02
Includes:
. Generator and analyzer for electrical STS-1 and STS-3 signals
allowing:
± Simulation and evaluation in the TOH / POH
± Generation and analysis of Anomalies and Defects
± Pointer generator and analyzer
. Generator and analyzer for bit error rate tests (BERT) at
6 Mbit/s with unframed, 1.5 and 45 Mbit/s with framed and
unframed test patterns
. VT1.5 mapping (DS1 in STS-1)
. Touchscreen
. 4 extension slots
. Ethernet and USB Interface
Generator unit
Digital outputs
Interfaces to Telcordia GR-253, TR-TSY-000499, ANSI T1.102
75 O coaxial output, adapter jack selectable from Versacon 9 adapter
system
Bit rates and line codes
DS1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1544 kbit/s; B8ZS, AMI, CMI
DS2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6312 kbit/s; B8ZS, CMI
DS3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 736 kbit/s; B3ZS, CMI
STS-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 840 kbit/s; B3ZS, CMI
STS-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 520 kbit/s; CMI
100 O balanced output, Bantam jack
Bit rate and line codes
DS1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1544 kbit/s; B8ZS, AMI, CMI
Output pulses
DS1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSX-1 compatible
DS2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . rectangular
DS3, STS-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HIGH, LOW, DSX-3
Bit rate offset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +500 ppm
Step size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.001 ppm
Clock
Internal clock generation
at all of the bit rates listed above.
Clock stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2 ppm
Synchronisation to external signals
via 100 O balanced input, Bantam jack:
± Reference clock . . . . . . . . . . . . . . . . . . . 1544 kHz and 2048 kHz
± 1544 kbit/s (B8ZS), 2048 kbit/s (HDB3) or
± Receive signal
Clock outputs
± Clock output at frequency of generator signal, approx. 400 mV
(when terminated into 75 O), BNC jack.
STS-3 output signal
Generation of a STS-3 signal conforming to Telcordia GR-253,
ANSI T1.105
The STS-3 signal consists of one internal STS-1 tributary signal with
the remaining two tributaries filled with UNEQ.
STS-1 output signal
Generation of a STS-1 signal conforming to Telcordia GR-253,
ANSI T1.105a
Mappings
VT1.5 mapping is included in the basic instrument. Other mappings
are added with option ªExtended SONET testingº.
Content of the selected tributary:
± Framed or unframed DS1 or DS3 test pattern
± M13 multiplex signal (with M13 MUX/DEMUX option)
± External DS1 or DS3 signal (with D&I option)
± Test pattern without stuffing bits (bulk signal to O.181)
Content of non-selected tributaries. . . . . . . . . . . . . framed PRBS 2 11 ±1
The various mappings are described along with the options.
Generation of Pointer actions (figure 1)
Generation of pointer actions at the STS-1 and VT levels
simultaneously.
± Pointer sequences to T1.105.03 with programmable spacing
± Pointer increment/decrement (continuously repeated)
± Single pointer
± Pointer value setting with or without NDF
Contents of TOH and POH bytes
The content of all bytes with the exception of B1/B2/B3 and H1 to H4
is programmable with any byte or a user defined byte-
sequence p in m in n (p frames in m frames and the entire sequence
repeated n times) can be inserted.
Bytes E1, E2, F1, F2, and byte groups D1 to D3 and D4 to D12:
± Transmission of a PRBS test pattern with bit error insertion
(see test patterns)
± Insertion of an external data signal via V.11 interface (also for K1
and K2)
Trace identifier
J0, J1, J2 . . . . . . . . . . programmable 16 byte ASCII sequence with CRC
J1, J2, additionally . . . . . . . . . . .programmable 64 byte ASCII sequence
H4 byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 or 48 byte sequence
Error insertion
Error types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B1, B2, B3 parity errors,
frame alignment signal errors, REI-L,
REI-P, bit errors in test pattern,
code errors (single errors)
Triggering
Single error or error ratio . . . . . . . . . . . . . . . . . . . 2610 ±3 to 1610 ±10
for B1, B3, REI-P . . . . . . . . . . . . . . . . . . . . . . . . 2610 ±4 to 1610 ±10
for bit errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1610 ±2 to 1610 ±9
Step size for mantissa and exponent . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Burst error: m anomalies in n periods
For FAS, B1, B2, B3, REI-L, REI-P . . . . . . . . . . . . . . m= 1 to 4.86610 6
and n = 2 to 8001 frames or 0.2 s to 600 s
3
Manual
pointer
manipulation
or using
pre-defined
standard
sequences
Figure 1:
Pointer actions.