Ap3595, Application information, Rv i / 5 . 0 – Diodes AP3595 User Manual
Page 13: Rv v i / ) 5 . 1 2
AP3595
Document number: DS36749 Rev. 1 - 2
13 of 23
January 2014
© Diodes Incorporated
AP3595
A Product Line of
Diodes Incorporated
Application Information
(Cont.)
9. Short Circuit Protection (SCP)
The AP3595 has over current protection (OCP) and output under voltage protection (UVP) functions.
9.1 OCP Function
The sensed current signals are monitored for over current protection. If I
CSN
is higher than 60
A, the over current protection OCP is activated.
Take the above case for example, the OCP level is calculated as:
A
m
k
A
I
OCP
120
2
2
60
2
The OCP is of latch-off type and can be reset by toggling RT/EN or VCC POR.
9.2 UVP Function
The output feedback voltage V
FB
is also monitored for under voltage protection after soft start. The UV threshold is set as V
FB
-V
SS
<-0.3V. The
under voltage protection has 30
s triggered delay. When UVP is triggered, both high side and low side are shutdown immediately.
OCP and UVP are latched functions. The IC can power off, and then power on or use RT/EN reset to restart again.
10. Over Voltage Protection (OVP)
The output voltage V
FB
is continuously monitored for over voltage protection. When it is 300mV higher than setting, the OVP function is triggered.
The over voltage protection has 30
s triggered delay. When OVP is triggered, the LGATE will go high and the HGATE will go low to discharge the
output capacitor.
11. Droop Setting
In some high current applications, a requirement on precisely controlled output impedance is imposed. This dependence of output voltage on load
current is often termed droop regulation. The droop control block generates a voltage through external resistor R
DRP
(Which is between SS and
EAP) and then sets the droop voltage. The droop voltage, V
DRP
, is proportional to the total current in two channels (For more information about the
I
CSN
and I
DRP
, please refer to the current sense section). As shown in the following equation:
DRP
DRP
SS
FB
R
I
V
V
Where I
DRP
is the droop current which is mirrored from I
CSN
. The output voltage also can be described as:
CSN
DRP
OUT
SS
DRP
DRP
SS
FB
R
R
DCR
I
V
R
I
V
V
2
1
12. Offset Current Setting
The AP3595 integrated IOFS allows the offset current to adjust phase current. The IOFS pin voltage is nominal 0.5V when connecting a resistor to
GND and 1.5V when connecting a resistor to VREF. Connecting a resistor from IOFS pin to GND generates a current source as:
OFS
I
OFS
R
V
I
/
5
.
0
This current is added to phase1 current signal I
SEN1
for current balance. Consequently, phase2 will share more percentage of output current.
Connecting a resistor from IOFS pin to VREF pin generates a current source as:
OFS
I
OFS
R
V
V
I
/
)
5
.
1
2
(
This current is added to phase2 current signal I
SEN2
for current balance. Consequently, phase1 will share more percentage of output current.
13. PWM Compensation
The output LC filter of a step down converter introduces a double pole, which contributes with -40dB/decade gain slope and 180 degrees phase
shift in the control loop. A compensation network among COMP, FB, and V
OUT
should be added. The compensation network is shown in Figure 9.
The output LC filters consist of the output inductors and output capacitors. For two-phase convertor, when assuming that V
IN1
=V
IN2
=V
IN
, L1=L2=L,
the transfer function of the LC filter is given by:
1
)
2
/
1
(
1
2
OUT
ESR
OUT
OUT
ESR
LC
C
R
s
C
L
s
C
R
s
Gain