Asus SP98-N - Manual (Page 50)

ASUS SP98-N User’s Manual 50
4. BIOS SETUP
4. BIOS SETUP Chipset Features
4.5 Chipset Features Setup
Chipset Features Setup controls the configuration of the board’s chipset. Control
keys for this screen are the same as for the previous screen.
NOTE: SETUP Defaults are noted in parenthesis next to each function heading.
4.5.1 Details of Chipset Features Setup
EDO/FPM Configuration (60ns DRAM)
The default setting of 60ns DRAM automatically sets the optimal timings for items 2–
7 for 60ns DRAM modules. If you are using 70ns DRAM modules, change this item
to 70ns DRAM. See 3.5 System Memory (DIMM) for memory installation informa-
tion. Disabled allows you to configure RAS Precharge Time, RAS to CAS Delay,
CAS Precharge Time, CAS Pulse Width (Read and Write), and Refresh RAS Asser-
tion. For DRAM Read Leadoff Time, leave this item on its default setting of 5T.
SDRAM Configuration (12ns SDRAM): Leave on default setting.
SDRAM Read Leadoff Time (Normal): Leave on default setting.
CPU to PCI Posted Write (Enabled)
This is a mechanism that, when Enabled, improves the performance of CPU to PCI
memory write and CPU to Idle data port write.
ROM Cycle Wait States (1-Wait): Timing for 16-bit ISA cards. Leave on default.
16-bit I/O Recovery Time (5 BUSCLK): Timing for 16-bit ISA cards. Leave on default.
8-bit I/O Recovery Time (8 BUSCLK): Timing for 8-bit ISA cards. Leave on default.
ISA Bus Clock (PCICLK/4): Timing for the ISA bus clock. Leave on default.