Max8720 – Rainbow Electronics MAX8720 User Manual
Page 26
MAX8720
significantly higher, consider increasing the size of N
H
.
Conversely, if the losses at V
IN(MAX)
are significantly
higher, consider reducing the size of N
H
. If V
IN
does
not vary over a wide range, maximum efficiency is
achieved by selecting a high-side MOSFET (N
H
) that
has conduction losses equal to the switching losses.
Choose a low-side MOSFET (N
L
) that has the lowest
possible on-resistance (R
DS(ON)
), comes in a moder-
ate-sized package (i.e., SO-8, DPAK, or D
2
PAK), and is
reasonably priced. Ensure that the MAX8720 DL gate
driver can supply sufficient current to support the gate
charge and the current injected into the parasitic drain-
to-gate capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems may
occur. Switching losses are not an issue for the low-
side MOSFET since it is a zero-voltage switched device
when used in the step-down topology.
Power MOSFET Dissipation
Worst-case conduction losses occur at the duty-factor
extremes. For the high-side MOSFET (N
H
), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
Generally, use a small high-side MOSFET to reduce
switching losses at high input voltages. However, the
R
DS(ON)
required to stay within package power-dissi-
pation limits often limits how small the MOSFET can be.
The optimum occurs when the switching losses equal
the conduction (R
DS(ON)
) losses. High-side switching
losses do not become an issue until the input is greater
than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N
H
) due to switching losses is difficult, since
it must allow for difficult-to-quantify factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on N
H
:
where C
RSS
is the reverse transfer capacitance of N
H
,
and I
GATE
is the peak gate-drive source/sink current
(2A typ).
Switching losses in the high-side MOSFET can become
a heat problem when maximum AC-adapter voltages
are applied, due to the squared term in the switching-
loss equation (C x V
IN
2 x f
SW
). If the high-side MOSFET
chosen for adequate R
DS(ON)
at low battery voltages
becomes extraordinarily hot when subjected to
V
IN(MAX)
, consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N
L
), the worst-case power
dissipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overload conditions that are
greater than I
LOAD(MAX)
but are not high enough to
exceed the current limit and cause the fault latch to trip.
To protect against this possibility, “overdesign” the cir-
cuit to tolerate:
where I
LIMIT
is the peak current allowed by the current-
limit circuit, including threshold tolerance and sense-
resistance variation. The MOSFETs must have a
relatively large heatsink to handle the overload power
dissipation.
Choose a Schottky diode (D
L
) with a forward-voltage
drop low enough to prevent the low-side MOSFET’s
body diode from turning on during the dead time. As a
general rule, select a diode with a DC current rating
equal to 1/3rd of the load current. This diode is optional
and can be removed if efficiency is not critical.
Boost Capacitors
The boost capacitors (C
BST
) must be selected large
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1µF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1µF. For these applications,
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
C
N Q
mV
BST
GATE
= ×
200
I
I
I
LIR
LOAD
LIMIT
LOAD MAX
=
−
(
)
2
PD N RESISTIVE
V
V
I
R
L
OUT
IN MAX
LOAD
DS ON
(
)
(
)
(
)
(
)
= −
1
2
PD N SWITCHING
V
C
f
I
I
H
IN MAX
RSS SW LOAD
GATE
(
)
(
)
(
)
=
2
PD N RESISTIVE
V
V
I
R
H
OUT
IN
LOAD
DS ON
(
)
(
)
(
)
=
×
2
Dynamically Adjustable 6-Bit VID
Step-Down Controller
26
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