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Tms320 second generation digital signal processors – Texas Instruments TMS320 User Manual

Page 17

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TMS320 SECOND GENERATION

DIGITAL SIGNAL PROCESSORS

SPRS010B — MAY 1987 — REVISED NOVEMBER 1990

POST OFFICE BOX 1443

HOUSTON, TEXAS 77001

17

TMS32020 PRODUCT NOTIFICATION

Texas Instruments has identified an unusual set of circumstances that will cause the BIT (Test Bit) instruction

on the TMS32020 to affect the contents of the accumulator; ideally, the BIT instruction should not affect the

accumulator. This set of conditions is:
1. The overflow mode is set (the OVM status register bit is set to one.)
2. And, the two LSBs of the BIT instruction opcode word are zero.

a. When direct memory addressing is used, every fourth data word is affected; all other locations are not

affected.

b. When indirect addressing is used, the two LSBs will be zero if a new ARP is not selected or if a new

ARP is selected and that ARP is 0 or 4.

3. And, adding the contents of the accumulator with the contents of the addressed data memory location,

shifted by 2

(bit code)

, causes an overflow of the accumulator.

If all of these conditions are met, the contents of the accumulator will be replaced by the positive or negative

saturation value, depending on the polarity of the overflow.
Various methods for avoiding this phenomenon are available:

If the TMS32020 is not in the saturation mode when the BIT instruction is executed, the device operates
properly and the accumulator is not affected.

Execute the Reset Overflow Mode (ROVM) instruction immediately prior to the BIT instruction and the Set
Overflow Mode (SOVM) instruction immediately following the BIT instruction.

If direct memory addressing is being used during the BIT instructions, reorganize memory so that the page
relative locations 0, 4, 8, C, 10 . . . are not used.

If indirect addressing is being used during the Bit instruction, select a new ARP which is not AR0 or AR4.
If necessary, follow the instruction with a LARP AR0 or LARP AR4 to restore the code.

Use the Test Bit Specified by T Register (BITT) instruction instead of the BIT instruction. The BITT instruction
operates correctly and will not affect the accumulator under any circumstances.

Replace TMS32020 with TMS320C25 for ideal pin-to-pIn and object-code compatibility. The BIT instruction
on the TMS320C25 executes properly and will not affect the accumulator under any circumstances.