Tms320 second generation digital signal processors – Texas Instruments TMS320 User Manual
Page 13
S
D
D
D
D
D
NO.
WORDS
DESCRIPTION
INSTRUCTION BIT CODE
MNEMONIC
NO.
WORDS
DESCRIPTION
INSTRUCTION BIT CODE
MNEMONIC
K
D
R
K
R
D
DP
R
D
D
R
K
R
CM
TMS320 SECOND GENERATION
DIGITAL SIGNAL PROCESSORS
SPRS010B — MAY 1987 — REVISED NOVEMBER 1990
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
13
Table 3. TMS320C25 Instruction Set Summary (continued)
ACCUMULATOR MEMORY REFERENCE INSTRUCTIONS
15 14 13 12 11 10 9
8 7
6 5
4 3
2 1
0
SUBT
†
Subtract from accumulator with shift specified by
T register
1
0
1
0
0
0
1
1
0
I
XOR
Exclusive-OR with accumulator
1
0
1
0
0
1
1
0
0
I
XORK
†
Exclusive-OR immediate with accumulator with
shift
2
1
1
0
1
0
0 0
0 0
1 1
0
ZAC
Zero accumulator
1
1
1
0
0
1
0
1
0 0
0 0
0 0
0 0
0
ZALH
Zero low accumulator and load high accumulator
1
0
1
0
0
0
0
0
0
I
ZALR
‡
Zero low accumulator and load high accumulator
with rounding
1
0
1
1
1
1
0
1
1
I
ZALS
Zero accumulator and load low accumulator with
sign extension suppressed
1
0
1
0
0
0
0
0
1
I
AUXILIARY REGISTERS AND DATA PAGE POINTER INSTRUCTIONS
15 14 13 12 11 10 9
8 7
6 5
4 3
2 1
0
ADRK
‡
Add to auxiliary register short immediate
1
0
1
1
1
1
1
1
0
CMPR
†
Compare auxiliary register with auxiliary
register AR0
1
1
1
0
0
1
1
1
0 0
1 0
1 0
0
LAR
Load auxiliary register
1
0
0
1
1
0
I
LARK
Load auxilliary register short immediate
1
1
1
0
0
0
LARP
Load auxilliary register pointer
1
0
1
0
1
0
1
0
1 1
0 0
0 1
LDP
Load data memory page pointer
1
0
1
0
1
0
0
1
0
I
LDPK
Load data memory page pointer immediate
1
1
1
0
0
1
0
0
LRLK
†
Load auxiliary register long immediate
2
1
1
0
1
0
0
0 0
0 0
0 0
0
MAR
Modify auxiliary register
1
0
1
0
1
0
1
0
1
I
SAR
Store auxiliary register
1
0
1
1
1
0
I
SBRK
‡
Subtract from auxiliary register short immediate
1
0
1
1
1
1
1
1
1
†
These instructions are not included in the TMS320C1x instruction set.
‡
These instructions are not included in the TMS32020 instruction set.