IBM POWERPC 750GL - Manual (Page 371)

User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
750gx_umIX.fm.(1.2)
March 27, 2006 Index
Page 371 of 377
register settings
MSR , 162
SRR0/SRR1 , 156
reset exception , 163
returning from an exception handler
,
161
summary table
,
152
system call exception
,
171
terminology , 151
thermal management interrupt exception , 174
Execution synchronization , 90
Execution unit timing examples
,
225
Execution units
,
31
External control instructions
,
117
,
300
F
Features, list , 25
Finish cycle, definition , 210
Floating-Point Execution Models—UISA , 83
Floating-point model
FE0/FE1 bits
,
160
FP arithmetic instructions
,
95
FP assist exceptions , 171
FP compare instructions , 97
FP multiply-add instructions , 96
FP operand , 84
FP rounding/conversion instructions , 96
FP store instructions
,
105
FP unavailable exception
,
171
FPSCR instructions , 97
IEEE-754 compatibility , 83
NI bit in FPSCR , 84
Floating-point unit
execution timing
,
232
latency, FP instructions
,
242
overview
,
31
Flush block operation , 143
FPRn (floating-point registers) , 59
FPSCR (floating-point status and control register)
FPSCR instructions , 97
FPSCR register description
,
59
G
GBL (global) signal
,
261
GPRn (general-purpose registers) , 59
Guarded memory bit (G bit) , 125
H, I, J, K
HIDn (hardware implementation-dependent) registers
HID0
description
,
65
doze bit , 337
DPM enable bit , 337
nap bit , 338
HID1
description
,
70
PLL configuration
,
277
HRESET (hard reset) signal
,
272
IABR (instruction address breakpoint register) , 64
ICTC (instruction cache throttling control) register , 77 ,
348
IEEE 1149.1-compliant interface
,
319
Illegal instruction class
,
88
Instruction cache
configuration , 124
instruction cache block fill operations , 139
organization , 125
Instruction cache throttling , 347
Instruction timing
examples
cache hit
,
220
cache miss
,
223
execution unit , 225
instruction flow , 215
memory performance considerations , 235
terminology , 209
Instructions
branch address calculation
,
106
branch instructions , 216 , 226 , 227
cache control instructions , 328
classes , 87
condition register logical , 107
defined instructions
,
87
external control instructions
,
117
floating-point
arithmetic , 95
compare , 97
FP rounding and conversion , 96
FP status and control register , 97
multiply-add , 96
illegal instructions
,
88
instruction cache throttling , 347
instruction flow diagram , 218
instruction serialization , 225
instruction serialization types , 225
instruction set summary , 86
integer
arithmetic
,
92
compare
,
93
logical , 94
rotate and shift , 95
integer instructions , 240
isync, instruction synchronization , 162
latency summary
,
238
load and store
address generation
floating-point , 103