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IBM POWERPC 750GL User Manual

Page 110

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User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor

Programming Model

Page 110 of 377

gx_02.fm.(1.2)

March 27, 2006

DBAT7L

575

10001

11111

Supervisor (OEA)

Both

DBAT7U

574

10001

11110

Supervisor (OEA)

Both

DEC

22

00000

10110

Supervisor (OEA)

Both

DSISR

18

00000

10010

Supervisor (OEA)

Both

EAR

282

01000

11010

Supervisor (OEA)

Both

IBAT0L

529

10000

10001

Supervisor (OEA)

Both

IBAT0U

528

10000

10000

Supervisor (OEA)

Both

IBAT1L

531

10000

10011

Supervisor (OEA)

Both

IBAT1U

530

10000

10010

Supervisor (OEA)

Both

IBAT2L

533

10000

10101

Supervisor (OEA)

Both

IBAT2U

532

10000

10100

Supervisor (OEA)

Both

IBAT3L

535

10000

10111

Supervisor (OEA)

Both

IBAT3U

534

10000

10110

Supervisor (OEA)

Both

IBAT4L

561

10001

10001

Supervisor (OEA)

Both

IBAT4U

560

10001

10000

Supervisor (OEA)

Both

IBAT5L

563

10001

10011

Supervisor (OEA)

Both

IBAT5U

562

10001

10010

Supervisor (OEA)

Both

IBAT6L

565

10001

10101

Supervisor (OEA)

Both

IBAT6U

564

10001

10100

Supervisor (OEA)

Both

IBAT7L

567

10001

10111

Supervisor (OEA)

Both

IBAT7U

566

10001

10110

Supervisor (OEA)

Both

LR

8

00000

01000

User (UISA)

Both

PVR

287

01000

11111

Supervisor (OEA)

mfspr

SDR1

25

00000

11001

Supervisor (OEA)

Both

SPRG0

272

01000

10000

Supervisor (OEA)

Both

SPRG1

273

01000

10001

Supervisor (OEA)

Both

SPRG2

274

01000

10010

Supervisor (OEA)

Both

SPRG3

275

01000

10011

Supervisor (OEA)

Both

SRR0

26

00000

11010

Supervisor (OEA)

Both

SRR1

27

00000

11011

Supervisor (OEA)

Both

Table 2-33. PowerPC Encodings

(Page 2 of 3)

Register Name

SPR

1

Access

mfspr/mtspr

Decimal

SPR[5–9]

SPR[0–4]

Note:

1. The order of the two 5-bit halves of the SPR number is reversed compared with actual instruction coding. For mtspr and mfspr

instructions, the SPR number coded in assembly language does not appear directly as a 10-bit binary number in the instruction.
The number coded is split into two 5-bit halves that are reversed in the instruction, with the high-order five bits appearing in bits
16–20 of the instruction and the low-order five bits in bits 11–15.

2. The TB Registers are referred to as TBRs rather than SPRs and can be written to using the mtspr instruction in supervisor mode

and the TBR numbers here. The TB Registers can be read in user mode using either the mftb or mfspr instruction and specifying
TBR 268 for TBL and SPR 269 for TBU.

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