4 time base enable (tben)-input, 5 tlb invalidate synchronize (tlbisync)-input, 12 processor mode selection signals – IBM POWERPC 750GL User Manual

Page 274: Table 7-6, Summary of mode select signals

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4 time base enable (tben)-input, 5 tlb invalidate synchronize (tlbisync)-input, 12 processor mode selection signals | Table 7-6, Summary of mode select signals | IBM POWERPC 750GL User Manual | Page 274 / 377

This manual is related to the following products:

POWERPC 750GX