Intel 41210 - Manual (Page 51)

Intel® 41210 Serial to Parallel PCI Bridge Design Guide 51
Circuit Implementations
Figure 24. PCI Express Analog Voltage Filter Circuit
Note: .
• Place C as close as possible to package pin.
• R must be placed between VCC15 and L.
• Route VCCAPE and VSSAPE as differential traces.
• VCCAPE and VSSAPE traces must be ground referenced (No VCC15 references).
• Max total board trace length = 1.2”.
• Min trace space to other nets = 30 mils.
10.1.3 Bandgap Analog Voltage Filter
Figure 25 Shows the Bandgap Analog Voltage Filter.
B2725 -01
R
C
VSSAPE
Intel fi 41210
Bridge
VCCAPE
L
VCC
Board Trace:
Trace Width > 25 mils
Trace Spacing < 10 mils
Trace Length < 600 mils
Breakout Trace:
Trace Width > 6 mils
Trace Spacing < 6 mils
Trace Length < 600 mils
Board Route
Traces
Breakout
Traces