FUJITSU MHV2120AT - Manual (Page 78)

Interface
5-2 C141-E218
5.1 Physical Interface
5.1.1 Interface signals
Figure 5.1 shows the interface signals.
Figure 5.1 Interface signals
DATA 0-15: DATA BUS
DMACK-: DMA ACKNOWLEDGE
PDIAG-: PASSED DIAGNOSTICS
CBLID-: CABLE TYPE IDENTIFIER
DASP-: DEVICE ACTIVE/SLAVE PRESENT
DMARQ: DMA REQUEST
INTRO: INTERRUPT REQUEST
DIOW-: I/O WRITE
STOP: STOP DURING ULTRA DMA DATA BURSTS
DA 0-2: DEVICE ADDRESS
CS0-: CHIP SELECT 0
CS1-: CHIP SELECT 1
RESET-: RESET
CSEL: CABLE SELECT
MSTR: Master
ENCSEL: ENABLE CSEL
GND: GROUND
DIOR-:I/O READ
HDMARDY:DMA READY DURING ULTRA DMA DATA IN BURSTS
HSTROBE:DATA STROBE DURING ULTRA DMA DATA OUT BURST
+5V DC: +5 volt
Host
IORDY:I/O READY
DDMARDY:DMA READY DURING ULTRA DMA DATA OUT BURSTS
DSTROBE: DATA STROBE DURING ULTRA DMA DATA IN BURSTS
IDD