FUJITSU MHV2120AT - Manual (Page 236)

Interface
5-160 C141-E218
5.6.3.8 Sustained Ultra DMA data out burst
5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes.
Note:
DD (15:0) and HSTROBE signals are shown at both the device and the host
to emphasize that cable setting time as well as cable propagation delay shall
not allow the data signals to be considered stable at the device until some
time after they are driven by the host.
Figure 5.17 Sustained Ultra DMA data out burst
HSTROBE
at host
HSTROBE
at device
DD(15:0)
at host
DD(15:0)
at device
t
2CYC
t
CYC
t
CYC
t
2CYC
t
DVH
t
DVHIC
t
DVS
t
DVSIC
t
DVS
t
DVSIC
t
DVH
t
DVHIC
t
DH
t
DHIC
t
DS
t
DSIC
t
DH
t
DHIC
t
DS
t
DSIC
t
DH
t
DHIC
t
DVH
t
DVHIC