FUJITSU MHV2120AT - Manual (Page 235)

5.6 Timing
C141-E218 5-159
5.6.3.7 Initiating an Ultra DMA data out burst
5.6.3.2 contains the values for the timings for each of the Ultra DMA Modes.
Note:
The definitions for the STOP, DDMARDY- and HSTROBE signal lines are
not in effect until DMARQ and DMACK- are asserted.
Figure 5.16 Initiating an Ultra DMA data out burst
DMARQ
(device)
DMACK-
(host)
STOP
(host)
DDMARDY-
(device)
HSTROBE
(host)
DD(15:0)
(host)
DA0, DA1, DA2
CS0-, CS1-
t
UI
t
ACK
t
ENV
t
ZIORDY
t
UI
t
LI
t
ACK
t
ACK
t
DVH
t
DVS
t
DZFS