HP Vectra VL 5/xxx Series 5 - Manual (Page 25)

25
2 System Board
Chip-Set
PCI/ISA Bridge Chip ( 82371SB )
This chip is encapsulated in a 208 pin plastic quad flat pack (PQFP)
package.
PCI Bus Interface This part of the chip performs PCI-to-ISA, and ISA-to-PCI bus cycle
translation. It supports the Plug-and-Play mechanism.
ISA Bus Interface As well as accepting cycles from the PCI bus interface, and translating them
for the ISA bus, the ISA bus interface also requests the PCI master bridge to
generate PCI cycles on behalf of a DMA or ISA master. The ISA bus interface
contains a standard ISA bus controller and data buffering logic. It can directly
support six ISA slots without external data or address buffering.
IDE Controller The PCI master/slave IDE controller, supporting four devices, two on each of
two channels, is described on page 34.
USB Controller The PCI USB controller, supporting two connectors, is described on page 36.
DMA Controller The seven channel DMA controller incorporates the functionality of two
82C37 DMA controllers. Channels 0 to 3 are for 8-bit DMA devices, while
channels 5 to 7 are for 16-bit devices (see page 82). The channels can be
programmed for any of the four transfer modes: the three active modes
(single, demand, block), can perform three different types of transfer: read,
write and verify. The address generation circuitry can only support a 24-bit
address for DMA devices.
Interrupt Controller The sixteen channel interrupt controller incorporates the functionality of
two 82C59 interrupt controllers. The two controllers are cascaded, giving 14
external and two internal interrupt sources (see page 82).
Counter / Timer The chip contains a three-channel 82C54 counter/timer. The counters use a
division of the 14.31818 MHz OSC input as the clock source.