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Smt6040, Table of figures, Sundance simulink toolbox – Sundance SMT6040 User Manual

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Sundance Multiprocessor Technology Limited

Form : QCF32

SMT6040

“Sundance Simulink Toolbox”

Date : 6 July 2006

Table of Figures

Figure 1: integration of Simulink diagrams in Diamond.............................................................8

Figure 2: sample DSP diagram ...................................................................................................10

Figure 3: Diamond project and connections...............................................................................11

Figure 4: data transfer .................................................................................................................11

Figure 5: channel configuration in System Generator............................................................... 13

Figure 6: System Generator configuration................................................................................. 15

Figure 7: netlist properties.......................................................................................................... 15

Figure 8 : SMT8246 SDR demo (FPGA tasks in red, DSP tasks in yellow) .............................. 17

Figure 9: SMT6040 diagram for SDR demo. .............................................................................18

Figure 10: Logical connections between DSP tasks (SDR demo)..............................................18

Figure 11: output of the SDR demo 3.......................................................................................... 19

Figure 12: SMT8036E SDR demo (FPGA tasks in red, DSP tasks in blue) ............................. 20

Figure 13: Video demo (FPGA tasks in red, DSP tasks in yellow)............................................. 21

Figure 14: logical connections between DSP tasks (Video demo).............................................22

Figure 15: Simulink diagram (Video demo) ...............................................................................22

Figure 16: basic Video processing example................................................................................23

Figure 17: DVIP demo (FPGA tasks in red, DSP tasks in yellow)..............................................24

Figure 18: logical connections between DSP tasks (DVIP demo) .............................................25

Figure 19: Simulink diagram (DVIP demo) ...............................................................................25

Figure 20: basic Video processing example on DVIP ................................................................26

Figure 21 : WiMAX demo (FPGA tasks in red, DSP tasks in yellow) ........................................27

Figure 22: SMT6040 diagram for WiMAX demo. .................................................................... 28

Figure 23: logical connections between DSP tasks (WiMAX demo).........................................29

Figure 24: output of the WiMAX demo......................................................................................29

Figure 25 : MIMO_LTE demo (FPGA tasks in red, DSP tasks in yellow) ............................... 30

Figure 26: SMT6040 diagram for MIMO_LTE demo............................................................... 31

Figure 27: logical connections between DSP tasks (MIMO_LTE demo)..................................32

Figure 28: output of the MIMO_LTE demo ..............................................................................32

Figure 29 : RadioGiga demo (FPGA tasks in red, DSP tasks in yellow)....................................33

Figure 30: SMT6040 diagram for RadioGiga demo..................................................................34

Figure 31: logical connections between DSP tasks (RadioGiga demo) .....................................35

Figure 32: output of the RadioGiga demo..................................................................................35

Figure 33: the SMT6040 Package ..............................................................................................37

Figure 34: a SMT6040 DSP-FPGA-ADC/DAC design............................................................... 41

SMT6040 - “Sundance Simulink Toolbox”

Last Edited: 08/01/2010 15.42

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