Integrate a simulink fpga design into diamond, Required signals, Channels – Sundance SMT6040 User Manual
Page 12: Ction 2.2, Smt6040, Sundance simulink toolbox

Sundance Multiprocessor Technology Limited
Form : QCF32
SMT6040
“Sundance Simulink Toolbox”
Date : 6 July 2006
To let the “T6040_root” task communicate with the “driver” task, the “driver” task needs to
have two additional output ports (named “to6040_0” and “to6040_1” respectively) and two
additional input ports (named “from6040_0” and “from6040_1” respectively). Connections
are created as in Figure 3.
Finally, the data transfer between the two DSP tasks can be set up thanks to the functions
“chan_out_message” and “chan_in_message” as in Figure 4. The printed output of the demo
demonstrates the behaviour of the task created by the SMT6040 (the sum of the two inputs is
calculated while the second input is passed through to the second output channel).
This procedure can be applied to any Diamond demo. Of course, the SMT6040 DSP task can
be modified in Simulink as for the users’ processing algorithms.
2.2 Integrate a Simulink FPGA design into Diamond
System Generator is a popular design tool from Xilinx that allows designing Simulink
diagrams targeting Xilinx FPGAs.
As previously pointed out, it is possible to create a Diamond FPGA task from a System
Generator project.
Therefore, similarly to the DSP case described in the previous chapter, it is possible to modify
a Diamond project or a Diamond demo (e.g. SDR or Video demos) by adding FPGA tasks
generated from a Simulink diagram.
This section describes how to use System Generator with Diamond to create and integrate a
Diamond FPGA task.
These instructions are extracted from Diamond User Guide. Please check it for more
.
2.2.1 Required
signals
System Generator will automatically add the following ports for you if there is at least one
synchronous element in the task. If your processing is purely asynchronous you can add a
register on the
validwords
signal to force system generator to implement these ports.
• clk
• ce
• rst
Port
ce_clr
is not added by System Generator. You should add an input gateway to your
model called '
ce_clr
' to ensure this signal is present on the interface on the core created by
System Generator.
2.2.2 Channels
Unfortunately, System Generator supports only those types defined in the
IEEE.STD
package; in particular, it does not support record types. This means that you cannot use the
convenient Diamond types described in Diamond User Guide; to create a channel you must
implement all of the signals explicitly. The simplest approach is to name the signals in the
same way as you would using record types, but replacing '
.
' with '
_
'. For example, the data
bus would be '
x_chan_in_0_Data
'. The ports are implemented using Gateway In and
Gateway Out elements.
Each input channel is specified as follows:
SMT6040 - “Sundance Simulink Toolbox”
Last Edited: 08/01/2010 15.42
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