Ctr1 out signal, Ctr2 clk signal, Ctr2 gate signal – Measurement Computing PCI-DAS6023 User Manual
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PCI-DAS6023 and PCI-DAS6025 User's Guide
Functional Details
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CTR1 OUT signal
This signal is present on the CTR1 OUT pin. The CTR1 OUT signal is the output of one of the two user’s
counters in an industry-standard 82C54 chip. For detailed information on counter operations, refer to the 82C54
data sheet. This data sheet is available on our web sit
Figure 25 shows the timing of the CTR1 OUT signal for counter mode 0 and mode 2.
Figure 25. CTR1 OUT signal timing
CTR2 CLK signal
The CTR2 CLK signal can serve as the clock source for independent user counter 2. It can be selected through
software at the CTR2 CLK pin rather than using the on-board 10 MHz or 100 kHz sources. It is also polarity
programmable. The maximum input frequency is 10 MHz. There is no minimum frequency specified. Figure 26
shows the timing requirements for the CTR2 CLK signal.
Figure 26. CTR2 CLK Signal Timing
CTR2 GATE signal
You can use the CTR2 GATE signal for starting and stopping the counter, saving counter contents, etc. It is
polarity programmable and is available at the CTR2 GATE pin. Figure 27 shows the timing requirements for
the CTR2 GATE signal.
Figure 27. CTR2 GATE Signal Timing