Measurement Computing PCI-DAS6023 - Manual (Page 27)

PCI-DAS6023 and PCI-DAS6025 User's Guide Functional Details
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Figure 22. D/A EXTERNAL TIME BASE signal timing
General-purpose counter signal timing
The general-purpose counter signals are:

CTR1 CLK
 CTR1 GATE
 CTR1 OUT
 CTR2 CLK
 CTR2 GATE
 CTR2 OUT
CTR1 CLK signal
The CTR1 CLK signal can serve as the clock source for independent user counter 1. It can be selected through
software at the CTR1 CLK pin rather than using the on-board 10 MHz or 100 kHz sources. It is also polarity
programmable. The maximum input frequency is 10 MHz. There is no minimum frequency specified. Figure 23
shows the timing requirements for the CTR1 CLK signal.
Figure 23. CTR1 CLK signal timing
CTR1 GATE signal
You can use the CTR1 GATE signal for starting and stopping the counter, saving counter contents, etc. It is
polarity programmable and is available at the CTR1 GATE pin. See Figure 24 for the minimum timing
specification.
Figure 24. CTR1 GATE signal timing