Artesyn RTM-ATCA-736x-DD Installation and Use (June 2014) - Manual (Page 52)

Mechanical and Connector Information
RTM-ATCA-736X-DD Installation and Use (6806800L82C) 52
4.2.2.2 Connector J30, Storage and Management Infrastructure Pin Assignments
The following table presents the RTM-ATCA-736X-DD J30 connector pin assignments and
descriptions:
Table 4-6 Connector P30, Management infrastructure Pin Assignments
Row Interface A B C D E F G H
1 88_Serial
_RXD 88_Serial
_TXD TDO TDI n.c. n.c. PS1_N POWERGOOD
2 SAS LSI_SAS[
3]TX+ LSI_SAS[
3]TX- LSI_SAS[
3]RX+ LSI_SAS[
3]RX- DCA2_SA
S_TX+ DCA2_SA
S_TX- DCA2_SA
S_RX+ DCA2_SAS_RX-
3 SAS LSI_SAS[
2]TX+ LSI_SAS[
2]TX- LSI_SAS[
2]RX+ LSI_SAS[
2]RX- DCA1_SA
S_TX+ DCA1_SA
S_TX- DCA1_SA
S_RX+ DCA1_SAS_RX-
4 USB USB+ USB- n.c. n.c. SATA[1]T
X+ SATA[1]T
X- SATA[1]R
X+ SATA[1]RX-
5 n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c.
6 PCIe-10 3 P10_Rx0
+
P10_Rx0- P10_Tx0
+
P10_Tx0- P10_Rx1
+
P10_Rx1- P10_Tx1
+
P10_Tx1-
7 PCIe-10 3 P10_Rx2
+
P10_Rx2- P10_Tx2
+
P10_Tx2- P10_Rx3
+
P10_Rx3- P10_Tx3
+
P10_Tx3-
8 Test P10_Clk1
00+ P10_Clk1
00- 88_PCIE_
RST JTAG_TRS
T JTAG_TC
K JTAG_TM
S 88_SHIFT
_CLK 88_LATCH_CLK
9 IPMB IPMB_SC
L IPMB_SD
A V3P3_M
GMT n.c. reserved 88_PS0_
N
88_RST_
KEY_N 88_RST_OUT_N
10 POWER VP12 VP12 n.c. n.c. n.c. ENABLE_
N I2C_CLK I2C_DAT
Table 4-7 Connector J30, Management Infrastructure Signal Descriptions
88_Serial_RXD O LVTTL Serial line receives data to the front board CPU.
88_Serial_TXD I LVTTL Serial line transmits data from the front board CPU.
V3P3_MGMT +3.3V Management Power is used exclusively for management power.
PS1_N O RTM Presence signal. The front board reads this active low signal to determine
if an RTM is present and fully inserted.