Power supply, A/d power supplies (u6, u7, u8), Power supply –17 – Altera Data Conversion HSMC User Manual
Page 23: A/d power supplies (u6, u7, u8) –17
Chapter 2: Board Components and Interfaces
2–17
Power Supply
© November 2008
Altera Corporation
Data Conversion HSMC Reference Manual
shows the I
2
C Serial EEPROM schematic.
Power Supply
A/D Power Supplies (U6, U7, U8)
The power supply block distributes clean power from the 12-V and 3.3-V input
supply (from the host board through the HSMC connector) to the Data Conversion
HSMC through on-board regulators. To provide various voltage options, the board
uses several Linear Technologies regulators.
lists the Power Supplies board reference and manufacturing information.
Figure 2–8. I
2
C Serial EEPROM Schematic
3.3 V
R95
R99
R100
NL-1.00K, 1%
NL-1.00K, 1%
NL-1.00K, 1%
R101
R102
R103
1.00K, 1%
1.00K, 1%
1.00K, 1%
U14
VCC
SCL
A0
A1
A2
SDA
WP
GND
3.3 V
8
1
2
3
IS24C02B
7
4
5
6
SCL
SDA
Table 2–21. Power Supplies Component Reference
Board Reference
Description
Manufacturer
Manufacturing
Part Number
Manufacturer
Website
U6, U7, U8
LT1963A - 1.5A, Low Noise, Fast
Transient Response LDO Regulators
Linear
Technologies
LT1963
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)