Leds – Altera Cyclone III FPGA Starter Board User Manual
Page 20

2–12
Altera Corporation
Cyclone III FPGA Starter Board Reference Manual
April 2012
Interfaces
User Push-Buttons
The four user push-buttons are intended for use in controlling FPGA
designs loaded into the Cyclone III device. There is no board-specific
function for these four push-buttons.
LEDs
The board has user LEDs and board-specific LEDs.
lists both
user and board-specific LED pinout. A logic “0” illuminate the LEDs.
shows the LEDs.
Figure 2–6. LEDs
User LEDs
Status and debugging signals are driven to the user LEDs from FPGA
designs loaded into the Cyclone III device. There is no board-specific
function for the user LEDs.
Table 2–10. Board LED Pinout
Signal Name
FPGA Pin Name
Direction
Type
LED0
P13
Output
2.5 V
LED1
P12 Output
2.5 V
LED2
N12
Output
2.5 V
LED3
N9
Output
2.5 V
Power LED
—
—
—
MAX Load LED
—
—
—
conf done LED
—
—
—
Flash LED
—
—
—
HSMC Present LED
—
—
—
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)