Altera Shift Register IP Core - Manual (Page 9)

Generating a Configurable 8-Bit SIPO or PISO Shift Register
To build and configure the LPM_SHIFTREG megafunction with the configurable 8-bit SIPO or PISO shift
register design example, perform the following steps:
1. In the Quartus II software, open the lpm_shiftreg_DesignExample_ex1.qar project.
2. On the Tools menu, click MegaWizard Plug-In Manager.
3. On page 1 of the MegaWizard Plug-In Manager, select Create a new custom megafunction variation,
and click Next.
4. On Page 2a of the MegaWizard Plug-In Manager select Stratix V from the Which device family will you
be using? list.
5. Click Verilog HDL under Which type of output file do you want to create?.
6. Expand the Memory Compiler folder and select LPM_SHIFTREG. Specify the output file
shiftreg_ex1 .
7. Click Next.
8. On Page 3, set the width of the output bus in he How wide should the ‘q’ output bus be? list to 8.
9. Under What direction do you want the registers to shift?, select Left.
10. Under What outputs do you want (select at least one)?, turn on both the Data output and Serial shift
data output options.
11. Under Do you want any optional inputs?, turn on all three options.
12. Click Next.
13. On page 4, under Synchronous inputs, turn off Clear and Set.
14. Under Asynchronous inputs, turn on Clear and Set.
15. Click Finish.
16. Turn on Verilog HDL black-box file.
17. Turn off AHDL Include file, VHDL Component declaration file, Quartus symbol file, and Instantiation
template file, and click Finish.
The LPM_SHIFTREG module is now built.
Implementing the Design Example
In this example, you assign the 5SGMD4E1H29C1 device to the project and compile the project.
1. In the Quartus II software, click Assignments > Device.
2. Under Device family, select Stratix V (GS/GT/GX/E) from the Family list.
3. Select Stratix V GS Mainstream on theDevices list.
4. Select Specific device selected in 'Available devices' list.
5. In the Available devices list, select 5SGMD4E1H29C1.
6. Leave the other options in the default state and click OK.
7. On the Processing menu, click Start Compilation.
A green check mark appears next to Compile Design in the Tasks window when compilation is complete.
Simulating the 8-Bit Shift Register in ModelSim-Altera
You can simulate the 8-bit shift register example in ModelSim-Altera.
This User Guide assumes that you are familiar with using ModelSim-Altera before trying out the design
example. If you are unfamiliar with ModelSim-Altera, refer to the support page at:
http://www.altera.com/support/software/products/modelsim/mod-modelsim.html .
Altera Corporation LPM_SHIFTREG Megafunction
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9 Generating a Configurable 8-Bit SIPO or PISO Shift Register
UG-033105
2013.03.05