Altera CIC MegaCore Function - Manual (Page 2)

Contents
About The CIC IP Core.......................................................................................1-1
Altera DSP IP Core Features...................................................................................................................... 1-1
CIC IP Core Features...................................................................................................................................1-1
CIC IP Core Device Family Support......................................................................................................... 1-2
DSP IP Core Verification............................................................................................................................1-2
CIC IP Core Release Information..............................................................................................................1-2
CIC IP Core Performance and Resource Utilization..............................................................................1-3
CIC IP Core Getting Started............................................................................... 2-1
Installing and Licensing IP Cores..............................................................................................................2-1
OpenCore Plus IP Evaluation........................................................................................................ 2-1
CIC IP Core OpenCore Plus Timeout Behavior......................................................................... 2-2
IP Catalog and Parameter Editor...............................................................................................................2-2
Specifying IP Core Parameters and Options............................................................................................2-3
Files Generated for Altera IP Cores...............................................................................................2-4
Simulating Altera IP Cores in other EDA Tools..................................................................................... 2-7
DSP Builder Design Flow............................................................................................................................2-8
CIC IP Core Functional Description.................................................................. 3-1
Variable Rate Change Factors.................................................................................................................... 3-2
Multichannel Support................................................................................................................................. 3-2
Multiple Input Single Output (MISO)..........................................................................................3-2
Single Input Multiple Output (SIMO)..........................................................................................3-3
Output Options............................................................................................................................................ 3-4
Output Data Width..........................................................................................................................3-4
Output Rounding.............................................................................................................................3-5
Hogenauer Pruning......................................................................................................................... 3-6
FIR Filter Compensation Coefficients...................................................................................................... 3-6
CIC IP Core Parameters..............................................................................................................................3-7
CIC IP Core Interfaces and Signals........................................................................................................... 3-9
Avalon-ST Interfaces in DSP IP Cores....................................................................................... 3-10
CIC IP Core Signals.......................................................................................................................3-11
Avalon-ST Interface Data Transfer Timing...............................................................................3-12
Packet Data Transfers....................................................................................................................3-12
Document Revision History................................................................................4-1
TOC-2
Altera Corporation