Feffective, Major tabs of the pdn tool 2.0 – Altera Device-Specific Power Delivery Network User Manual
Page 6
F
EFFECTIVE
As previously illustrated, a capacitor reduces PDN impedance by providing a least-impedance route
between power and ground. Impedance of a capacitor at high frequency is determined by its parasitics
(ESL and ESR). For a PCB-mount capacitor, the parasitics include not only the parasitic from the
capacitors themselves but also those associated with mounting, PCB spreading, and packaging. Therefore,
PCB capacitor parasitics are generally higher than those of on-package decoupling capacitor and on-die-
capacitance. Decoupling using PCB capacitors becomes ineffective at high frequency. Using PCB
capacitors for PDN decoupling beyond their effective frequency range brings little improvement to PDN
performance and raises the bill of materials (BOM) cost.
To help reduce over-design of PCB decoupling, this release of the PDN tool provides a suggested PCB
decoupling design cut-off frequency (F
EFFECTIVE
) as another guideline. It is calculated using the PCB,
package, and die parasitics. You only need to design PCB decoupling that keeps Z
EFF
under Z
TARGET
up to
F
EFFECTIVE
.
Refer to Troubleshooting Z
EFF
if the Z
EFF
is too high or the number of capacitors for decoupling becomes
too high.
Note: F
EFFECTIVE
may not be enough when the Altera FPGA device shares a power rail with another
device. The noise generated from other devices propagates along the PDN and affects FPGA device
performance. The frequency of the noise is determined by the transfer impedance between the
noise source and the FPGA device, and can be higher than F
EFFECTIVE
. Reducing PDN parasitic
inductance and increasing the isolation between the FPGA device and noise source reduces this
risk. You must perform a transfer impedance analysis to clearly identify any noise interference risk.
Related Information
•
•
Major Tabs of the PDN Tool 2.0
The tabs at the bottom of the PDN tool 2.0 application help you calculate your impedance profile.
Table 3: PDN Tool 2.0 Tabs
Tab
Description
Release_Notes
Provides the legal disclaimers, the revision history of the tool,
and the user agreement.
Introduction
Displays the schematic representation of the circuit that is
modeled as part of the PDN tool 2.0. It also provides the
following related information:
• a quick start instruction
• recommended settings for some power rails
• a brief description of decoupling design procedures under
different power supply connection schemes
6
F
EFFECTIVE
UG-01157
2015.03.06
Altera Corporation
Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide