Echelon Neuron C - Manual (Page 189)

Neuron C Programmer’s Guide 177
Chips without Off-Chip Memory
On-chip memory on the Neuron 3120 Chips and on the FT 3120 Smart
Transceiver consists of ROM, RAM, and EEPROM. None of these devices
supports off-chip memory. Figure 17 summarizes the memory maps.
Neuron 3120 Chip
On-Chip Memory
EC00
EFFF
F200
F1FF
F000
FFFF
0000
27FF
ROM
(Neuron Chip Firmware)
EEFAR
EENEAR
Reserved
EECODE
RAMFAR
E800
EFFF
F800
F7FF
F000
FFFF
RAMNEAR
0000
27FF
ROM
(Neuron Chip Firmware)
Neuron 3120E2 Chip
On-Chip Memory
EEFAR
EENEAR
Reserved
EECODE
RAMFAR
EC00
EFFF
F400
F3FF
F000
FFFF
RAMNEAR
0000
27FF
ROM
(Neuron Chip Firmware)
Neuron 3120E1 Chip
On-Chip Memory
E800
EFFF
F200
F1FF
F000
FFFF
EEFAR
EENEAR
Reserved
EECODE
RAMFAR
RAMNEAR
EEFAR
EENEAR
Reserved
EECODE
RAMFAR
ROM
(Neuron Chip Firmware)
ROM
(Application Code)
EECODE
EEFAR
RAMCODE
RAMFAR
RAMNEAR
0000
E7FF
(maximum)
3FFF
4000
Neuron 3150 Chip
Off-Chip Memory
Off-chip
memory
areas must
be
in the order
shown but
need not be
contiguous.
If there is
off-chip
RAM, the
linker may
place
RAMNEAR
off-chip.
Neuron 3150 Chip
On-Chip Memory
Figure 17. Memory Maps for the Various Chips, Showing Areas Defined by
the Linker
Memory Regions
The definitions of the three memory regions are as follows:
• ROM : Non-volatile memory initialized before program execution on a
device. ROM cannot be changed by the program. It is used for the