ADLINK cPCI-6870 - Manual (Page 31)

Functional Description 17
cPCI-6870
X On-die, primary 32-KB instruction cache and 32-KB
write-back data cache
X On-die, 1-MB second level shared cache with advanced
transfer cache architecture
X 800-MHz source-synchronous front side bus (FSB)
X Supports Intel® architecture with Intel® Wide Dynamic Execu-
tion
X Digital Thermal Sensor (DTS)
X 956-ball Micro-FCBGA packaging technology
X Execute Disable Bit support for enhanced security
X Intel® 64 architecture (formerly Intel® EM64T)
X Architectural and performance enhancements of the Core
microarchitecture.
3.2 Chipset
The cPCI-6870 Series incorporates the Mobile Intel® 82GS45
Graphics and Memory Controller Hub (GMCH) and 82801IUX I/O
Controller Hub (ICH9M-SFF).
Intel® GS45 Graphics Memory Controller Hub
The following outlines the key features of GS45 GMCH.
Processor Support
X Intel® Core™2 Duo, Intel® Core™2 Solo, and Intel® Cel-
eron® mobile processors based on the 45-nm process
X 800-MHz and 1066-MHz FSBSupport for Dynamic FSB Fre-
quency Switching
X Support for Intel® Virtualization Technology (Intel® VT) for
Directed I/O (Intel® VT-d) (DMA)
X 36-bit interface to addressing, allowing the CPU to access
the entire 64 GB of the GMCH’s memory address space