Cypress Perform nvSRAM - Manual (Page 15)

PRELIMINARY
CY14B102L, CY14B102N
Document #: 001-45754 Rev. *B Page 15 of 24
Truth Table For SRAM Operations
HSB should remain HIGH for SRAM Operations.
For x8 Configuration
CE WE OE Inputs/Outputs
[2]
Mode Power
H X X High Z Deselect/Power down Standby
L H L Data Out (DQ
0
–DQ
7
); Read Active
L H H High Z Output Disabled Active
L L X Data in (DQ
0
–DQ
7
); Write Active
For x16 Configuration
CE WE OE BHE BLE Inputs/Outputs [2] Mode Power
H X X X X High-Z Deselect/Power down Standby
L X X H H High-Z Output Disabled Active
L H L L L Data Out (DQ
0
–DQ
15
) Read Active
L H L H L Data Out (DQ
0
–DQ
7
);
DQ
8
–DQ
15
in High-Z
Read Active
L H L L H Data Out (DQ
8
–DQ
15
);
DQ
0
–DQ
7
in High-Z
Read Active
L H H L L High-Z Output Disabled Active
L H H H L High-Z Output Disabled Active
L H H L H High-Z Output Disabled Active
L L X L L Data In (DQ
0
–DQ
15
) Write Active
L L X H L Data In (DQ
0
–DQ
7
);
DQ
8
–DQ
15
in High-Z
Write Active
L L X L H Data In (DQ
8
–DQ
15
);
DQ
0
–DQ
7
in High-Z
Write Active
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